1. Field of the Invention
The present invention relates to a digital/analog converter (to be referred to as a D/A converter hereinafter) and, more particularly, to an arrangement of segments constituting a D/A converter with respect to a semiconductor chip.
2. Description of the Related Art
High-speed D/A converters for processing video signals are generally classified into three types: a type using a segment current system; a type using a weighted current system; and a type using a combination of these systems.
FIG. 1 shows a conventional segment current system. In this system, (2.sup.2 -1) identical segments are arranged on a semiconductor chip in correspondence with a digital signal having an n-bit binary code. That is, constantcurrent sources Al to A(2.sup.2 -1) constituting the segments are arranged on the semiconductor chip. One end of each of the constant-current sources Al to A(2.sup.2 -1) is connected to the ground potential. The other end of
each of the constant-current sources Al to A(2.sup.2 -1) is connected to a current output terminal Iout or Iout through a corresponding switch SW. In this arrangement, the switches SW are controlled to sequentially increase the number of constant-current sources connected to the current output terminal Iout or Iout one by one from one end to the other end of the arrangement of the constant-current sources A1 to A(2.sup.2 -1) in accordance with an increase in value of the digital signal.
In this segment current system, in order to increase the conversion precision, current values I of the respective constant-current sources must be matched with each other. It is, however, difficult to match the current values I because of wiring resistance differences between the ground and the respective constant-current sources A1 to A(2.sup.2 -1) or variations in element characteristics of the constant-current sources A1 to A(2.sup.2 -1). For this reason, the D/A conversion precision is degraded by current value variations.
"An 80-MHz 8-bit CMOS D/A Converter", J. Solid State Circuits, Vol. SC-21, No. 6, P.P. 983-988, Dec. 1986 discloses a segment arrangement for suppressing degradation of precision due to variations in current value of the respective constant-current sources A1 to A(2.sup.2 -1).
FIG. 2 schematically shows the contents of the above-mentioned literature. As shown in FIG. 2, in constant-current sources A1 to A7 connected to each other through wiring resistors R, when the number of constant-current sources connected to one of the current output terminals is to be increased one by one in accordance with an increase in value of the digital signal, the constant-current source A1 located in the middle of the arrangement of the constant-current sources A1 to A7 is selected first. Subsequently, the constant-current sources A2, A3, . . . located on both the sides of the constant-current source A1 in the middle are alternately and symmetrically selected. With this manner of selection, variations in current values due to wiring resistors R can be suppressed.
"An 8-bit CMOS Video DAC", ISSCC Dig. Tech. Papers, P.P. 32-33, Feb. 1985 discloses a system based on a combination of conventional segment current and weighted current systems.
FIG. 3 schematically shows the contents of the above-mentioned literature. Referring to FIG. 3, a digital signal input having an 8-bit binary code is divided into upper and lower 4 bits. The current value of each of 15 constant-current sources A1 to A15 selected by the upper 4 bits is weighted 16 times that of each of 15 constant-current sources B1 to B15 selected by the lower 4 bits, and the above-described segment current system is applied to the upper and lower bits, respectively.
In comparison with the above-described segment current systems, this combined system allows considerable simplification of a decoder for decoding a digital signal and outputting a segment selection signal, and can realize high resolution.
In this system, however, similar to the conventional segment current systems, in order to increase the D/A conversion precision, current values 16I of the respective constant-current sources A1 to A15 for the upper bits must be matched with each other, and current values I of the respective constant-current sources B1 to B15 for the lower bits must also be matched with each other. It is, however, difficult to match the respective current values 16I or I because of wiring resistance differences between the ground and the respective constant-current sources or variations in element characteristics of the respective constant-current sources. For this reason, the D/A conversion precision is degraded due to variations in current value.
In addition, if the ratios of the current values of the constant-current sources A1 to A15 for the upper bits and of the constant-current sources B1 to B15 for the lower bits do not match with each other, level differences occur between D/A conversion outputs at the changing points of the upper bits as shown in FIG. 4. Therefore, even a linear increase, as important characteristics of a D/A converter, cannot be ensured.